About the role
The team develops advanced application-specific integrated circuits for Starlink's satellite and ground infrastructure. The engineer defines micro-architectures, implements RTL designs in Verilog/System Verilog, and collaborates with verification and physical implementation teams. This role also involves silicon bring-up and validation activities.
Our summary of the posting; the original is on the SpaceX careers page.
What the posting requires
- Required
- US citizenship
- Verilog
- RTL
- System Verilog
- Bachelor's degree
- Electrical engineering
- Computer engineering
- Computer science
- Extended hours
- Preferred
- Clock domain crossings
- AXI
- High speed design
- Python
- EDA tools
- Power optimization
These tags are our reading of the posting. They can miss something; the original posting is the reference.