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About the role

The team develops AI accelerator hardware, ensuring optimal electrical characteristics from chip to system. This role involves detailed signal and power integrity assessments, close work with various engineering groups, and guiding the electrical specifications for cutting-edge packaging technologies.

Our summary of the posting; the original is on the Etched careers page.

What the posting requires

Required
  • HBM
  • ANSYS HFSS
  • CoWoS
  • SerDes
  • SIwave
  • Advanced packaging
  • D2D interfaces
  • Cadence Sigrity
  • Interposer
Preferred
  • Multi-die packaging
  • 2.5D packaging
  • 3D packaging
  • Chip-package-system
  • CPS co-design
  • RTL-to-GDSII

These tags are our reading of the posting. They can miss something; the original posting is the reference.

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