About the role
The team develops field-programmable gate arrays for satellite applications. The engineer writes RTL code, interfaces FPGAs with various components, and develops software for testing hardware.
Our summary of the posting; the original is on the Astranis careers page.
What the posting requires
- Required
- US citizenship
- Verilog
- SystemVerilog
- Synthesis
- Bachelor
- Master
- Electrical engineering
- Computer science
- Computer engineering
- Hands-on design
- Preferred
- UVM
- Xilinx
- Vivado
- High speed data converters
- Circuit level debugging
- Digital communication theory
These tags are our reading of the posting. They can miss something; the original posting is the reference.