About the role
The front-end verification team builds and maintains testbenches for the CPU's instruction fetch and branch prediction units. The engineer develops test stimulus, creates checkers, and integrates reference models to ensure complex microarchitectural scenarios are verified.
Our summary of the posting; the original is on the Tenstorrent careers page.
What the posting requires
- Required
- SystemVerilog
- Transactors
- UVM
- Constrained-random
- C++
- Verification plans
- Predictors
- Testbench
- Directed tests
- Reference models
- Preferred
- Simulators
- Verilator
- Emulation
These tags are our reading of the posting. They can miss something; the original posting is the reference.